
BPS / MX / RS Series SCPI Programming Manual AMETEK Programmable Power
Manual P/N 7003-961 Rev. AA 133
5.2 *ESE
This command programs the Standard Event Status Enable register bits. The programming
determines which events of the Standard Event Status Event register (see *ESR?) are
allowed to set the ESB (Event Summary Bit) of the Status Byte register. A "1" in the bit
position enables the corresponding event. All of the enabled events of the Standard Event
Status Event Register are logically ORed to cause the Event Summary Bit (ESB) of the
Status Byte Register to be set. See section 5.3 for descriptions of the Standard Event Status
registers.
The query reads the Standard Event Status Enable register.
Bit Configuration of Standard Event Status Enable Register
Bit Position 7 6 5 4 3 2 1 0
Bit Name PON not
used
CME EXE DDE QYE not
used
OPC
Bit Weight 128 32 16 8 4 1
CME Command error DDE Device-dependent error
EXE Execution error OPC Operation complete
PON Power-on QYE Query error
Command Syntax *ESE <NRf>
Parameters 0 - 255
Power-On Value 0 (see *PSC command)
Example *ESE 129
Query Syntax *ESE?
Returned Parameters <NR1>(Register value)
Related Commands *ESR? *STB?
5.3 *ESR?
This query reads the Standard Event Status Event register. Reading the register clears it.
The bit configuration of this register is the same as the Standard Event Status Enable
register (see *ESE). See chapter 7for a detailed explanation of this register.
Query Syntax *ESR?
Parameters None
Returned Parameters <NR1>(Register value)
Related Commands *CLS *ESE *ESE?
*OPC
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